How to Run the test using UVM

Once we have all the Verification Environment available we need to perform compile, optimize, debug and simulate the defined test to check for transcation on DUT.

Below example illustrates how we can integrate our verification package with Testbench having DUT in picture.

e.g 

module top();

 import  uvm_pkg ::*;

 import tx_pkg ::*;

 // create handle for Virtual interface

 // instiate the DUT

     initial begin

 // configure Virtual interface using uvm_config_db with set() method

         run_test();

      end

endmodule

   

   




























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